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S3P70F4

更新时间:2010.11.18 文件大小:4MB 查看次数:
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General Description
The S3C70F2/C70F4 single-chip CMOS microcontroller has been designed for high-performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).

The S3P70F4 is the microcontroller which has 4 Kbyte one-time-programmable ROM and the functions are the same to S3C70F2/C70F4. With a four-channel comparator, eight LED direct drive pins, serial I/O interface, and its versatile 8-bit timer/counter, the S3C70F2/C70F4 offers an excellent design solution for a wide variety of generalpurpose applications.

Up to 24 pins of the 30-pin SDIP package can be dedicated to I/O. Five vectored interrupts provide fast response to internal and external events. In addition, the S3C70F2/C70F4's advanced CMOS technology provides for very low power consumption and a wide operating voltage range - all at a very low cost.
Features
  • Memory
    - 512 x 4-bit data memory (RAM)
    - 2048 x 8-bit program memory (ROM) : S3C70F2
    4096 x 8-bit program memory (ROM) : S3C70F4
  • 24 I/O Pins
    - I/O: 18 pins, including 8 high current pins
    - Input only: 6 pins
  • Comparator
    - 4-channel mode: Internal reference (4-bit resolution) 16-step variable reference voltage
    - 3-channel mode: External reference 150 mV resolution (worst case)
  • 8-bit Basic Timer
    - Programmable interval timer
    - Watch-dog timer
  • 8-bit Timer/Counter 0
    - Programmable interval timer
    - External event counter function Timer/counter clock output to TCLO0 pin
  • Watch Timer
    - Time interval generation: 0.5 s, 3.9 ms at 4.19 MHz
    - 4 frequency outputs to BUZ pin
  • 8-bit Serial I/O Interface
    - 8-bit transmit/receive mode
    - 8-bit receive-only mode
    - LSB-first or MSB-first transmission selectable
    - Internal or external clock source
  • Bit Sequential Carrier
    - Supports 16-bit serial data transfer in arbitrary format
  • Interrupts
    - Two external interrupt vectors
    - Three internal interrupt vectors
    - Two quasi-interrupts
  • Memory-Mapped I/O Structure
    - Data memory bank 15
  • Two Power-Down Modes
    - Idle mode: Only CPU clock stops
    - Stop mode: System clock stops
  • OSCILLATION SOURCES
    - Crystal, Ceramic for system clock
    - Crystal/ceramic: 0.4 - 6.0 MHz
    - CPU clock divider circuit (by 4. 8, or 64)
  • Instruction Execution Times
    - 0.95, 1.91, 15.3 µs at 4.19 MHz
    - 0.67, 1.33, 10.7 µs at 6.0 MHz
  • Operating Temperature
    - -25°C to 85°C
  • Operating Voltage Range
    - 1.8 V to 5.5 V
  • Package Type
    - 30 SDIP, 32 SOP
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