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S3P72N4

Update:2010.11.19 File Size:4MB Views:
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General Description
The S3C72N2/C72N4 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).
With features such as, LCD direct drive capability, 8-bit timer/counter, and watch timer, the S3C72N2/C72N4 offers an excellent design solution for a wide variety of applications that require LCD functions.
Up to 16 pins of the 64-pin QFP package, it can be dedicated to I/O. Four vectored interrupts provide fast response to internal and external events. In addition, the S3C72N2/C72N4 's advanced CMOS technology provides for low power consumption and a wide operating voltage range.

OTP
The S3C72N2/C72N4 microcontroller is also available in OTP (One Time Programmable) version, S3P72N4 . The S3P72N4 microcontroller has an on-chip 4-Kbyte one-time-programmable EPROM instead of masked ROM. The S3P72N4 is comparable to S3C72N2/C72N4, both in function and in pin configuration.
Features
  • Memory
    - 288 X 4-bit RAM
    - 2048 X 8-bit ROM (S3C72N2)
    - 4096 X 8-bit ROM (S3C72N4)
  • I/O Pins
    - Input only: 4 pins
    - I/O: 12 pins
    - Output: 8 pins sharing with segment driver outputs
  • LCD Controller/Driver
    - Maximum 16-digit LCD direct drive capability
    - 32 segment, 4 common pins
    - Display modes: Static, 1/2 duty (1/2 bias), 1/3 duty (1/2 or 1/3 bias), 1/4 duty (1/3 bias)
  • 8-Bit Basic Timer
    - Programmable interval timer
    - Watchdog timer
  • 8-Bit Timer/Counter
    - Programmable 8-bit timer
    - External event counter
    - Arbitrary clock frequency output
  • Watch Timer
    - Real-time and interval time measurement
    - Four frequency outputs to BUZ pin
    - Clock source generation for LCD
  • Bit Sequential Carrier
    - Support 16-bit serial data transfer in arbitrary format
  • Interrupts
    - Two internal vectored interrupts
    - Two external vectored interrupts
    - Two quasi-interrupts
  • Memory-Mapped I/O Structure
    - Data memory bank 15
  • Two Power-Down Modes
    - Idle mode (only CPU clock stops)
    - Stop mode (main or sub system oscillation stops)
  • Oscillation Sources
    - Crystal, ceramic, or RC for main system clock
    - Crystal or external oscillator for subsystem clock
    - Main system clock frequency: 4.19 MHz (typical)
    - Subsystem clock frequency: 32.768 kHz
    - CPU clock divider circuit (by 4, 8, or 64)
  • Instruction Execution Times
    - 0.95, 1.91, 15.3 µs at 4.19 MHz (main)
    - 122 µs at 32.768 kHz (subsystem)
  • Operating Temperature
    - - 40°C to 85°C
  • Operating Voltage Range
    - 2.0 V to 5.5 V at 4.19 MHz
    - 1.8 V to 5.5 V at 3 MHz
  • Package Type
    - 64-pin QFP
Development tools for MCU
Programming console for MCU
Development tools for ARM
the C compiler
Contact
Samsung SCM:

ic168@zh-ic.COM

Development Tools:

B6078S@163.com

Site suggestions:

zh-ic@163.com

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